Re: Decision time.... should NATA become the default for this release?

[Matthew Dillon <dillon@xxxxxxxxxxxxxxxxxxxx>]

:The patch had no effect.
:
:Sascha

    Try patch #2.  I'm still trying to figure out what is going on but
    UDMA2 is 33 MBytes/sec and the register 54 bits are for 66 and 100
    Mbytes/sec, not 33.  A comparison was wrong (I think, but I am not
    sure).

    Please please work!

					-Matt
					Matthew Dillon 
					<dillon@backplane.com>

Index: ata-chipset.c
===================================================================
RCS file: /cvs/src/sys/dev/disk/nata/ata-chipset.c,v
retrieving revision 1.4
diff -u -r1.4 ata-chipset.c
--- ata-chipset.c	1 Jun 2007 00:31:14 -0000	1.4
+++ ata-chipset.c	2 Jun 2007 20:13:12 -0000
@@ -1881,6 +1881,9 @@
     if (error)
 	return;
 
+    /*
+     * reg48: 0x0001 << devno	== DMA 33 mode  (any DMA mode)
+     */
     if (mode >= ATA_UDMA0) {
 	pci_write_config(gparent, 0x48, reg48 | (0x0001 << devno), 2);
 	pci_write_config(gparent, 0x4a,
@@ -1891,16 +1894,20 @@
 	pci_write_config(gparent, 0x48, reg48 & ~(0x0001 << devno), 2);
 	pci_write_config(gparent, 0x4a, (reg4a & ~(0x3 << (devno << 2))), 2);
     }
+
+    /*
+     * reg54: 0x0001 << devno	DMA 66 mode
+     * reg54: 0x1000 << devno	DMA 100 mode
+     */
     reg54 |= 0x0400;
-    if (mode >= ATA_UDMA2)
-	pci_write_config(gparent, 0x54, reg54 | (0x1 << devno), 2);
-    else
-	pci_write_config(gparent, 0x54, reg54 & ~(0x1 << devno), 2);
+    reg54 &= ~((0x1 << devno) | (0x1000 << devno));
 
     if (mode >= ATA_UDMA5)
-	pci_write_config(gparent, 0x54, reg54 | (0x1000 << devno), 2);
-    else 
-	pci_write_config(gparent, 0x54, reg54 & ~(0x1000 << devno), 2);
+	reg54 |= (0x1000 << devno);
+    else if (mode >= ATA_UDMA3)
+	reg54 |= (0x1 << devno);
+
+    pci_write_config(gparent, 0x54, reg54, 2);
 
     reg40 &= ~0x00ff00ff;
     reg40 |= 0x40774077;