DragonFly commits List (threaded) for 2009-04
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Re: DragonFly-2.3.0.828.gd7215 master sys/dev/netif/emx if_emx.h
:Mmm, setting __cachealign on struct field (i.e. in emx_softc) does not
:achieve what I want here: I want the struct's size to be (N *
:cacheline_size) in addition to be cacheline_size aligned. So in
:ifpoll, CPU0's writing to rx_data[0] will not pollute rx_data[1]'s
:cache in CPU1.
:
:Best Regards,
:sephe
Ah, I see. Yes, that makes sense. In the old days we would
accomplish that by explicitly padding the structure, or creating
an enclosing structure with the pad to declare the array as.
In anycase, I guess __cachealign is fine. I just hate using that
GCC extension, it is so non-standard.
-Matt
Matthew Dillon
<dillon@backplane.com>
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