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Re: CPU_ENABLE_SSE changed to CPU_DISABLE_SSE


From: Craig Dooley <cd5697@xxxxxxxxxx>
Date: Tue, 29 Jul 2003 09:51:09 -0400

Okay, got a bit carried away and submitted before testing build with the 
option on and off.  New patch also cleans up unused proc and thread stuctures 
in linux emulation and gets rid of MIN redeclaration in the kern directory.  
Im not sure what you want to do about imported software.  Also, should the 
unused proc/td structures in linux be removed?  They are just commented out 
in this patch.

-Craig

On Tuesday 29 July 2003 09:20 am, Craig Dooley wrote:
> New default is to include SSE support unless explicitly told otherwise. 
> This should help a couple multimedia ports like mplayer.

-- 
Craig Dooley						 cd5697@xxxxxxxxxx
Index: compat/linux/linux_misc.c
===================================================================
RCS file: /home/dcvs/src/sys/compat/linux/linux_misc.c,v
retrieving revision 1.7
diff -u -r1.7 linux_misc.c
--- compat/linux/linux_misc.c	26 Jul 2003 18:12:40 -0000	1.7
+++ compat/linux/linux_misc.c	29 Jul 2003 13:47:51 -0000
@@ -475,8 +475,8 @@
 int
 linux_select(struct linux_select_args *args)
 {
-	struct thread *td = curthread;
-	struct proc *p = td->td_proc;
+/*	struct thread *td = curthread; */
+/*	struct proc *p = td->td_proc; */
 	struct select_args bsa;
 	struct timeval tv0, tv1, utv, *tvp;
 	caddr_t sg;
@@ -587,10 +587,10 @@
 int     
 linux_mremap(struct linux_mremap_args *args)
 {
-	struct thread *td = curthread;
+/*	struct thread *td = curthread; */
 	struct munmap_args bsd_args; 
 	int error = 0;
-	struct proc *p = td->td_proc;
+/*	struct proc *p = td->td_proc; */
 
 	KKASSERT(p);
  
@@ -645,8 +645,8 @@
 int
 linux_time(struct linux_time_args *args)
 {
-	struct thread *td = curthread;
-	struct proc *p = td->td_proc;
+/*	struct thread *td = curthread; */
+/*	struct proc *p = td->td_proc; */
 	struct timeval tv;
 	l_time_t tm;
 	int error;
@@ -927,8 +927,8 @@
 int
 linux_personality(struct linux_personality_args *args)
 {
-	struct thread *td = curthread;
-	struct proc *p = td->td_proc;
+/*	struct thread *td = curthread; */
+/*	struct proc *p = td->td_proc; */
 
 	KKASSERT(p);
 #ifdef DEBUG
@@ -1254,8 +1254,8 @@
 int
 linux_sched_getscheduler(struct linux_sched_getscheduler_args *args)
 {
-	struct thread *td = curthread;
-	struct proc *p = td->td_proc;
+/*	struct thread *td = curthread; */
+/*	struct proc *p = td->td_proc; */
 	struct sched_getscheduler_args bsd;
 	int error;
 
Index: kern/kern_random.c
===================================================================
RCS file: /home/dcvs/src/sys/kern/kern_random.c,v
retrieving revision 1.4
diff -u -r1.4 kern_random.c
--- kern/kern_random.c	4 Jul 2003 05:57:27 -0000	1.4
+++ kern/kern_random.c	29 Jul 2003 13:37:52 -0000
@@ -119,10 +119,6 @@
 #endif
 static struct wait_queue *random_wait;
 
-#ifndef MIN
-#define MIN(a,b) (((a) < (b)) ? (a) : (b))
-#endif
-	
 void
 rand_initialize(void)
 {
Index: kern/subr_sbuf.c
===================================================================
RCS file: /home/dcvs/src/sys/kern/subr_sbuf.c,v
retrieving revision 1.2
diff -u -r1.2 subr_sbuf.c
--- kern/subr_sbuf.c	17 Jun 2003 04:28:41 -0000	1.2
+++ kern/subr_sbuf.c	29 Jul 2003 13:40:12 -0000
@@ -56,7 +56,6 @@
 #define KASSERT(e, m)
 #define SBMALLOC(size)		malloc(size)
 #define SBFREE(buf)		free(buf)
-#define min(x,y)		MIN(x,y)
 #endif /* _KERNEL */
 
 /*
@@ -298,7 +297,7 @@
 		return (0);
 	if (len > SBUF_FREESPACE(s)) {
 		sbuf_extend(s, len - SBUF_FREESPACE(s));
-		len = min(len, SBUF_FREESPACE(s));
+		len = MIN(len, SBUF_FREESPACE(s));
 	}
 	if (copyin(uaddr, s->s_buf + s->s_len, len) != 0)
 		return (-1);
@@ -364,7 +363,7 @@
 		len = SBUF_FREESPACE(s);	/* XXX return 0? */
 	if (len > SBUF_FREESPACE(s)) {
 		sbuf_extend(s, len);
-		len = min(len, SBUF_FREESPACE(s));
+		len = MIN(len, SBUF_FREESPACE(s));
 	}
 	switch (copyinstr(uaddr, s->s_buf + s->s_len, len + 1, &done)) {
 	case ENAMETOOLONG:
@@ -426,7 +425,7 @@
 	 * vsnprintf() returns the amount that would have been copied,
 	 * given sufficient space, hence the min() calculation below.
 	 */
-	s->s_len += min(len, SBUF_FREESPACE(s));
+	s->s_len += MIN(len, SBUF_FREESPACE(s));
 	if (!SBUF_HASROOM(s) && !SBUF_CANEXTEND(s))
 		SBUF_SETFLAG(s, SBUF_OVERFLOWED);
 
Index: kern/uipc_usrreq.c
===================================================================
RCS file: /home/dcvs/src/sys/kern/uipc_usrreq.c,v
retrieving revision 1.5
diff -u -r1.5 uipc_usrreq.c
--- kern/uipc_usrreq.c	26 Jul 2003 19:42:11 -0000	1.5
+++ kern/uipc_usrreq.c	29 Jul 2003 13:40:40 -0000
@@ -1012,10 +1012,6 @@
 	LIST_INIT(&unp_shead);
 }
 
-#ifndef MIN
-#define	MIN(a,b) (((a)<(b))?(a):(b))
-#endif
-
 static int
 unp_internalize(struct mbuf *control, struct thread *td)
 {
Index: conf/options.i386
===================================================================
RCS file: /home/dcvs/src/sys/conf/options.i386,v
retrieving revision 1.2
diff -u -r1.2 options.i386
--- conf/options.i386	17 Jun 2003 04:28:20 -0000	1.2
+++ conf/options.i386	29 Jul 2003 12:58:07 -0000
@@ -65,7 +65,7 @@
 CYRIX_CACHE_WORKS		opt_cpu.h
 CYRIX_CACHE_REALLY_WORKS	opt_cpu.h
 NO_MEMORY_HOLE			opt_cpu.h
-CPU_ENABLE_SSE			opt_cpu.h
+CPU_DISABLE_SSE			opt_cpu.h
 CPU_ATHLON_SSE_HACK		opt_cpu.h
 
 # The CPU type affects the endian conversion functions all over the kernel.
Index: conf/options.pc98
===================================================================
RCS file: /home/dcvs/src/sys/conf/options.pc98,v
retrieving revision 1.2
diff -u -r1.2 options.pc98
--- conf/options.pc98	17 Jun 2003 04:28:20 -0000	1.2
+++ conf/options.pc98	29 Jul 2003 13:00:12 -0000
@@ -64,7 +64,7 @@
 CYRIX_CACHE_WORKS		opt_cpu.h
 CYRIX_CACHE_REALLY_WORKS	opt_cpu.h
 NO_MEMORY_HOLE			opt_cpu.h
-CPU_ENABLE_SSE			opt_cpu.h
+CPU_DISABLE_SSE			opt_cpu.h
 CPU_ATHLON_SSE_HACK		opt_cpu.h
 
 # The CPU type affects the endian conversion functions all over the kernel.
Index: i386/conf/LINT
===================================================================
RCS file: /home/dcvs/src/sys/i386/conf/LINT,v
retrieving revision 1.2
diff -u -r1.2 LINT
--- i386/conf/LINT	17 Jun 2003 04:28:35 -0000	1.2
+++ i386/conf/LINT	29 Jul 2003 13:01:17 -0000
@@ -177,7 +177,7 @@
 # reorder).  This option should not be used if you use memory mapped
 # I/O device(s).
 #
-# CPU_ENABLE_SSE enables SSE/MMX2 instructions support.
+# CPU_DISABLE_SSE disables SSE/MMX2 instructions support.
 #
 # CPU_FASTER_5X86_FPU enables faster FPU exception handler.
 #
@@ -244,7 +244,7 @@
 options 	CPU_DIRECT_MAPPED_CACHE
 options 	CPU_DISABLE_5X86_LSSER
 options 	CPU_ELAN
-options 	CPU_ENABLE_SSE
+options 	CPU_DISABLE_SSE
 options 	CPU_FASTER_5X86_FPU
 options 	CPU_I486_ON_386
 options 	CPU_IORT
Index: i386/i386/initcpu.c
===================================================================
RCS file: /home/dcvs/src/sys/i386/i386/initcpu.c,v
retrieving revision 1.4
diff -u -r1.4 initcpu.c
--- i386/i386/initcpu.c	21 Jul 2003 07:57:43 -0000	1.4
+++ i386/i386/initcpu.c	29 Jul 2003 13:35:27 -0000
@@ -69,7 +69,7 @@
 SYSCTL_INT(_hw, OID_AUTO, instruction_sse, CTLFLAG_RD,
     &hw_instruction_sse, 0, "SIMD/MMX2 instructions available in CPU");
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 u_int	cpu_fxsr;		/* SSE enabled */
 #endif
 
@@ -519,8 +519,8 @@
 void
 enable_sse(void)
 {
-#if defined(CPU_ENABLE_SSE)
-	if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) {
+#ifndef CPU_DISABLE_SSE
+	if ((cpu_feature & CPUID_SSE) && (cpu_feature & CPUID_FXSR)) {
 		load_cr4(rcr4() | CR4_FXSR | CR4_XMM);
 		cpu_fxsr = hw_instruction_sse = 1;
 	}
Index: i386/i386/machdep.c
===================================================================
RCS file: /home/dcvs/src/sys/i386/i386/machdep.c,v
retrieving revision 1.30
diff -u -r1.30 machdep.c
--- i386/i386/machdep.c	26 Jul 2003 19:07:47 -0000	1.30
+++ i386/i386/machdep.c	29 Jul 2003 13:05:38 -0000
@@ -128,10 +128,10 @@
 extern void initializecpu(void);
 
 static void cpu_startup __P((void *));
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
 static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 #ifdef DIRECTIO
 extern void ffs_rawread_setup(void);
 #endif /* DIRECTIO */
@@ -2263,7 +2263,7 @@
 	return (0);
 }
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 static void
 fill_fpregs_xmm(sv_xmm, sv_87)
 	struct savexmm *sv_xmm;
@@ -2315,20 +2315,20 @@
 
 	sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
 }
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 
 int
 fill_fpregs(p, fpregs)
 	struct proc *p;
 	struct fpreg *fpregs;
 {
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	if (cpu_fxsr) {
 		fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
 						(struct save87 *)fpregs);
 		return (0);
 	}
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 	bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
 	return (0);
 }
@@ -2338,13 +2338,13 @@
 	struct proc *p;
 	struct fpreg *fpregs;
 {
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	if (cpu_fxsr) {
 		set_fpregs_xmm((struct save87 *)fpregs,
 				       &p->p_thread->td_pcb->pcb_save.sv_xmm);
 		return (0);
 	}
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 	bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
 	return (0);
 }
Index: i386/isa/npx.c
===================================================================
RCS file: /home/dcvs/src/sys/i386/isa/npx.c,v
retrieving revision 1.10
diff -u -r1.10 npx.c
--- i386/isa/npx.c	23 Jul 2003 02:30:19 -0000	1.10
+++ i386/isa/npx.c	29 Jul 2003 13:08:24 -0000
@@ -99,7 +99,7 @@
 #define	fnstsw(addr)		__asm __volatile("fnstsw %0" : "=m" (*(addr)))
 #define	fp_divide_by_0()	__asm("fldz; fld1; fdiv %st,%st(1); fnop")
 #define	frstor(addr)		__asm("frstor %0" : : "m" (*(addr)))
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 #define	fxrstor(addr)		__asm("fxrstor %0" : : "m" (*(addr)))
 #define	fxsave(addr)		__asm __volatile("fxsave %0" : "=m" (*(addr)))
 #endif
@@ -118,7 +118,7 @@
 void	fnstsw		__P((caddr_t addr));
 void	fp_divide_by_0	__P((void));
 void	frstor		__P((caddr_t addr));
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 void	fxsave		__P((caddr_t addr));
 void	fxrstor		__P((caddr_t addr));
 #endif
@@ -127,15 +127,15 @@
 
 #endif	/* __GNUC__ */
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 #define GET_FPU_EXSW_PTR(pcb) \
 	(cpu_fxsr ? \
 		&(pcb)->pcb_save.sv_xmm.sv_ex_sw : \
 		&(pcb)->pcb_save.sv_87.sv_ex_sw)
-#else /* CPU_ENABLE_SSE */
+#else /* CPU_DISABLE_SSE */
 #define GET_FPU_EXSW_PTR(pcb) \
 	(&(pcb)->pcb_save.sv_87.sv_ex_sw)
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 
 typedef u_char bool_t;
 
@@ -508,7 +508,7 @@
 	 */
 	npxsave(&dummy);
 	stop_emulating();
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	/* XXX npxsave() doesn't actually initialize the fpu in the SSE case. */
 	if (cpu_fxsr)
 		fninit();
@@ -871,7 +871,7 @@
 npxsave(addr)
 	union savefpu *addr;
 {
-#if defined(SMP) || defined(CPU_ENABLE_SSE)
+#if defined(SMP) || !defined(CPU_DISABLE_SSE)
 
 	stop_emulating();
 	fpusave(addr);
@@ -880,7 +880,7 @@
 	start_emulating();
 	mdcpu->gd_npxthread = NULL;
 
-#else /* SMP or CPU_ENABLE_SSE */
+#else /* SMP or !CPU_DISABLE_SSE */
 
 	u_char	icu1_mask;
 	u_char	icu2_mask;
@@ -922,7 +922,7 @@
       union savefpu *addr;
 {
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	if (cpu_fxsr)
 		fxsave(addr);
 	else
@@ -935,7 +935,7 @@
       union savefpu *addr;
 {
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	if (cpu_fxsr)
 		fxrstor(addr);
 	else
Index: i386/linux/linux_ptrace.c
===================================================================
RCS file: /home/dcvs/src/sys/i386/linux/linux_ptrace.c,v
retrieving revision 1.5
diff -u -r1.5 linux_ptrace.c
--- i386/linux/linux_ptrace.c	26 Jul 2003 18:12:43 -0000	1.5
+++ i386/linux/linux_ptrace.c	29 Jul 2003 13:09:44 -0000
@@ -215,7 +215,7 @@
 	l_long		padding[56];
 };
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 static int
 linux_proc_read_fpxregs(struct proc *p, struct linux_pt_fpxreg *fpxregs)
 {
@@ -339,7 +339,7 @@
 		}
 		break;
 	case PTRACE_SETFPXREGS:
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 		error = copyin((caddr_t)uap->data, &r.fpxreg,
 		    sizeof(r.fpxreg));
 		if (error)
@@ -347,7 +347,7 @@
 #endif
 		/* FALL THROUGH */
 	case PTRACE_GETFPXREGS: {
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 		struct proc *p;
 
 		if (sizeof(struct linux_pt_fpxreg) != sizeof(struct savexmm)) {
Index: pc98/i386/machdep.c
===================================================================
RCS file: /home/dcvs/src/sys/pc98/i386/machdep.c,v
retrieving revision 1.6
diff -u -r1.6 machdep.c
--- pc98/i386/machdep.c	26 Jul 2003 21:35:27 -0000	1.6
+++ pc98/i386/machdep.c	29 Jul 2003 13:10:24 -0000
@@ -133,10 +133,10 @@
 extern void initializecpu(void);
 
 static void cpu_startup __P((void *));
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
 static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 #ifdef DIRECTIO
 extern void ffs_rawread_setup(void);
 #endif /* DIRECTIO */
@@ -2293,7 +2293,7 @@
 	return (0);
 }
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 static void
 fill_fpregs_xmm(sv_xmm, sv_87)
 	struct savexmm *sv_xmm;
@@ -2345,20 +2345,20 @@
 
 	sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
 }
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 
 int
 fill_fpregs(p, fpregs)
 	struct proc *p;
 	struct fpreg *fpregs;
 {
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	if (cpu_fxsr) {
 		fill_fpregs_xmm(&p->p_addr->u_pcb.pcb_save.sv_xmm,
 						(struct save87 *)fpregs);
 		return (0);
 	}
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 	bcopy(&p->p_addr->u_pcb.pcb_save.sv_87, fpregs, sizeof *fpregs);
 	return (0);
 }
@@ -2368,13 +2368,13 @@
 	struct proc *p;
 	struct fpreg *fpregs;
 {
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	if (cpu_fxsr) {
 		set_fpregs_xmm((struct save87 *)fpregs,
 					   &p->p_addr->u_pcb.pcb_save.sv_xmm);
 		return (0);
 	}
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 	bcopy(fpregs, &p->p_addr->u_pcb.pcb_save.sv_87, sizeof *fpregs);
 	return (0);
 }
Index: pc98/pc98/npx.c
===================================================================
RCS file: /home/dcvs/src/sys/pc98/pc98/npx.c,v
retrieving revision 1.4
diff -u -r1.4 npx.c
--- pc98/pc98/npx.c	10 Jul 2003 04:47:55 -0000	1.4
+++ pc98/pc98/npx.c	29 Jul 2003 13:11:19 -0000
@@ -103,7 +103,7 @@
 #define	fnstsw(addr)		__asm __volatile("fnstsw %0" : "=m" (*(addr)))
 #define	fp_divide_by_0()	__asm("fldz; fld1; fdiv %st,%st(1); fnop")
 #define	frstor(addr)		__asm("frstor %0" : : "m" (*(addr)))
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 #define	fxrstor(addr)		__asm("fxrstor %0" : : "m" (*(addr)))
 #define	fxsave(addr)		__asm __volatile("fxsave %0" : "=m" (*(addr)))
 #endif
@@ -122,7 +122,7 @@
 void	fnstsw		__P((caddr_t addr));
 void	fp_divide_by_0	__P((void));
 void	frstor		__P((caddr_t addr));
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 void	fxsave		__P((caddr_t addr));
 void	fxrstor		__P((caddr_t addr));
 #endif
@@ -131,15 +131,15 @@
 
 #endif	/* __GNUC__ */
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 #define GET_FPU_EXSW_PTR(pcb) \
 	(cpu_fxsr ? \
 		&(pcb)->pcb_save.sv_xmm.sv_ex_sw : \
 		&(pcb)->pcb_save.sv_87.sv_ex_sw)
-#else /* CPU_ENABLE_SSE */
+#else /* CPU_DISABLE_SSE */
 #define GET_FPU_EXSW_PTR(pcb) \
 	(&(pcb)->pcb_save.sv_87.sv_ex_sw)
-#endif /* CPU_ENABLE_SSE */
+#endif /* CPU_DISABLE_SSE */
 
 typedef u_char bool_t;
 
@@ -557,7 +557,7 @@
 	 */
 	npxsave(&dummy);
 	stop_emulating();
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	/* XXX npxsave() doesn't actually initialize the fpu in the SSE case. */
 	if (cpu_fxsr)
 		fninit();
@@ -912,7 +912,7 @@
 npxsave(addr)
 	union savefpu *addr;
 {
-#if defined(SMP) || defined(CPU_ENABLE_SSE)
+#if defined(SMP) || !defined(CPU_DISABLE_SSE)
 
 	stop_emulating();
 	fpusave(addr);
@@ -921,7 +921,7 @@
 	start_emulating();
 	mdcpu->gd_npxthread = NULL;
 
-#else /* SMP or CPU_ENABLE_SSE */
+#else /* SMP or CPU_DISABLE_SSE */
 
 	u_char	icu1_mask;
 	u_char	icu2_mask;
@@ -981,7 +981,7 @@
       union savefpu *addr;
 {
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	if (cpu_fxsr)
 		fxsave(addr);
 	else
@@ -994,7 +994,7 @@
       union savefpu *addr;
 {
 
-#ifdef CPU_ENABLE_SSE
+#ifndef CPU_DISABLE_SSE
 	if (cpu_fxsr)
 		fxrstor(addr);
 	else

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