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Re: frequency scaling on D525MW not working properly


From: Sepherosa Ziehau <sepherosa@xxxxxxxxx>
Date: Tue, 24 Jul 2012 09:57:06 +0800

On Tue, Jul 24, 2012 at 3:24 AM, Sven Gaerner <sgaerner@gmx.net> wrote:
> On Mon, Jul 23, 2012 at 09:44:06AM +0800, Sepherosa Ziehau wrote:
>> On Mon, Jul 23, 2012 at 3:27 AM, Sascha Wildner <saw@online.de> wrote:
>> > On Sun, 22 Jul 2012 21:16:54 +0200, Sven Gaerner <sgaerner@gmx.net> wrote:
>> >
>> >> On Sun, Jul 22, 2012 at 08:31:41PM +0200, Sascha Wildner wrote:
>> >>>
>> >>> On Sun, 22 Jul 2012 13:46:41 +0200, Sven Gaerner <sgaerner@gmx.net>
>> >>> wrote:
>> >>>
>> >>> >[...]
>>
>> Hmm, disabling UEFI is OK, but make sure that you have enabled EST in
>> BIOS (something probably read like "enhanced speed step" or something
>> like "P-state").
> There is no such option. And the only UEFI option is to enable booting
> of an UEFI compliant OS. Speed stepping cannot be configured. The BIOS
> options are very limited.
>
>> Besides CPU P-State, you could also set allowable CPU C-State to C3 by
>> setting sysctl hw.acpi.cpu.cx_lowest and put tunable
>> hw.i8254.intr_disable="0" in /boot/loader.conf (you need to reboot
>> after changing /boot/loader.conf).  However, it should be noted that
>> enabling C3 will disable LAPIC timer and i8254 timer will be used
>> instead, which may cause extra overhead.
> This seems not to change anything. The temperature remains the same. And
> setting hw.acpi.cpu.cx_lowest returns with "Invalid Argument".

I mean following steps:
1) Add the following line into into /boot/loader.conf, then reboot:
    hw.i8254.intr_disable="0"
2) sysctl hw.acpi.cpu.cx_lowest=C3

Best Regards,
sephe

-- 
Tomorrow Will Never Die



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