DragonFly submit List (threaded) for 2004-07
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Re: p4tcc.c from FreeBSD
Matt,
-On [20040727 01:12], Matthew Dillon (dillon@xxxxxxxxxxxxxxxxxxxx) wrote:
> With that said I think it would be fine for the p4tcc patch
> to be committed. I do not think it would interfere with the
> other work either and we might learn something by playing with
> it in the mean time.
Given this snippet of code:
if ((cpu_feature & (CPUID_ACPI | CPUID_TM)) != (CPUID_ACPI | CPUID_TM))
return;
Should I make it enabled by default?
CPU: Intel(R) Pentium(R) 4 CPU 1.60GHz (1594.80-MHz 686-class CPU)
Origin = "GenuineIntel" Id = 0xf12 Stepping = 2
Features=0x3febfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM>
You see at the end of the features line the TM feature.
Contrast this to:
CPU: Pentium II/Pentium II Xeon/Celeron (374.06-MHz 686-class CPU)
Origin = "GenuineIntel" Id = 0x665 Stepping = 5
Features=0x183fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR>
CPU: AMD Duron(tm) Processor (1194.92-MHz 686-class CPU)
Origin = "AuthenticAMD" Id = 0x671 Stepping = 1
Features=0x383f9ff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR,SSE>
AMD Features=0xc0400000<AMIE,DSP,3DNow!>
CPU: AMD Athlon(tm) XP 1800+ (1528.99-MHz 686-class CPU)
Origin = "AuthenticAMD" Id = 0x662 Stepping = 2
Features=0x383fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR,SSE>
AMD Features=0xc0480000<MP,AMIE,DSP,3DNow!>
Neither one has TM.
--
Jeroen Ruigrok van der Werven <asmodai(at)wxs.nl> / asmodai / kita no mono
Free Tibet! http://www.savetibet.org/ | http://www.tibet.nu/
http://www.tendra.org/ | http://diary.in-nomine.org/
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