Re: [GSOC] Implement hardware nested page table support for vkernels

[Mihai Carabas <mihai.carabas@xxxxxxxxx>]

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Hello,



> At this point I have a single-core vkernel running in VMX non-root
> context, without sendmail. The sendmail is throwing an UD fault. I will
> investigate today and see what instruction is missing. Also I will
> implement the check for UD instruction (if it is "syscall" opcode or
> anything else). Another thing is modifying the vkernel a bit further in
> order to be able to run with multiple cores.
>
The sendmail problem was due to the fact that CR4_XSAVE wasn't enabled and
the instructions associated with it were thrown UD fault (e.g. "xgetbv") .
It was a little hard to find it because at first the db_disasm was letting
me know that the instruction was the "lgdt", but it was impossible (the
vkernel userspace doesn't execute this instruction). Than I manually
checked the byte code and saw in the Intel Reference Manual the
instruction. Also I've enriched the db_disasm code to recognize these new
group of instructions (the code is not so tightly coupled as the original
one -> should have a review before commiting to master).

Also I've implemented the support for multiple cores and is working ok in
some random situations. Due to race condition I think, the vkernel threads
enters in some infinit loops trying to solve some faults. I've spent the
last 3-4 days debugging this and with the help of Dillon and vsrinivas I
managed to advanced a little with the debugging, but the source of the bug
is unknown yet.

Also Dillon did a little refactoring to my code, modifying the way I cached
some attributes, in order to modify those attributes only and only when is
needed. I didn't integrate the code to my branch yet (I took only some
pieces of it). I will do this after I solve the bug.

After solving the bug, the next big steps are starting configuring EPT and
see what can I reuse from the "old" pmap code.

Thanks,
Mihai

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<div dir=3D"ltr">Hello,<br><div class=3D"gmail_extra"><br><div class=3D"gma=
il_quote"><div>=A0</div><blockquote class=3D"gmail_quote" style=3D"margin:0=
px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);b=
order-left-style:solid;padding-left:1ex">
<div dir=3D"ltr"><div class=3D"gmail_extra"><div class=3D"gmail_quote"><div=
></div><div>At this point I have a single-core vkernel running in VMX non-r=
oot context, without sendmail. The sendmail is throwing an UD fault. I will=
 investigate today and see what instruction is missing. Also I will impleme=
nt the check for UD instruction (if it is &quot;syscall&quot; opcode or any=
thing else). Another thing is modifying the vkernel a bit further in order =
to be able to run with multiple cores.</div>
</div></div></div></blockquote><div>The sendmail problem was due to the fac=
t that CR4_XSAVE wasn&#39;t enabled and the instructions associated with it=
 were thrown UD fault (e.g. &quot;xgetbv&quot;) . It was a little hard to f=
ind it because at first the db_disasm was letting me know that the instruct=
ion was the &quot;lgdt&quot;, but it was impossible (the vkernel userspace =
doesn&#39;t execute this instruction). Than I manually checked the byte cod=
e and saw in the Intel Reference Manual the instruction. Also I&#39;ve enri=
ched the db_disasm code to recognize these new group of instructions (the c=
ode is not so tightly coupled as the original one -&gt; should have a revie=
w before commiting to master).</div>
<div><br></div><div>Also I&#39;ve implemented the support for multiple core=
s and is working ok in some random situations. Due to race condition I thin=
k, the vkernel threads enters in some infinit loops trying to solve some fa=
ults. I&#39;ve spent the last 3-4 days debugging this and with the help of =
Dillon and vsrinivas I managed to advanced a little with the debugging, but=
 the source of the bug is unknown yet.</div>
<div><br></div><div>Also Dillon did a little refactoring to my code, modify=
ing the way I cached some attributes, in order to modify those attributes o=
nly and only when is needed. I didn&#39;t integrate the code to my branch y=
et (I took only some pieces of it). I will do this after I solve the bug.</=
div>
<div><br></div><div>After solving the bug, the next big steps are starting =
configuring EPT and see what can I reuse from the &quot;old&quot; pmap code=
.=A0</div><div><br></div><div>Thanks,</div><div>Mihai</div></div></div></di=
v>

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