Re: mtd_cpl question

[Matthew Dillon <dillon@xxxxxxxxxxxxxxxxxxxx>]

:
:On Thu, Jun 02, 2005 at 09:37:28AM -0700, Matthew Dillon wrote:
:>     I will do #1 today, simply by replacing all current SPL operations with
:>     a critical section.
:
:I would expect this to hurt performance a lot.
:
:Joerg

   I would expect this to hurt performance not at all.

   Have you taken a look at the SPL masks recently?  Just about all major
   devices are covered by the most basic SPL anyway, so for all intents and
   purposes a splbio() or splvm() is going to be equivalent to a critical 
   section.

   Also, keep in mind that the cpu is going to be executing instructions
   no matter what while in an SPL or critical section... whether they 
   are mainline instructions or interrupt instructions.  The only issue
   is interrupt *latency*, not so much cpu efficiency, and frankly SPLs 
   are not held long enough for interrupt latency to be effected virtually
   at all, and even then we are only talking about a few microseconds at
   worst.

   So the answer is:  It won't hurt performance.

					-Matt
					Matthew Dillon 
					<dillon@xxxxxxxxxxxxx>