Re: git: pci: Support PCI Express Configuration Space memory-mapped access mechanism

[Sepherosa Ziehau <sepherosa@xxxxxxxxx>]

On Thu, May 24, 2012 at 5:43 AM, YONETANI Tomokazu <y0n3t4n1@gmail.com> wrote:
> On Mon, May 14, 2012 at 10:30:12PM -0700, Sepherosa Ziehau wrote:
>>
>> commit 926777f68f1249ebbd1561eecc6fa75576bd4e10
>> Author: Sepherosa Ziehau <sephe@dragonflybsd.org>
>> Date:   Mon May 14 17:13:17 2012 +0800
>>
>>     pci: Support PCI Express Configuration Space memory-mapped access mechanism
>>
>>     Also remove the outdated type 2 Configuration Space access mechanism;
>>     it should never been seen on platforms w/ AMD64 capable CPUs.
>>
>>     Obtained-from: FreeBSD
>>
>> Summary of changes:
>>  sys/bus/pci/x86_64/pci_cfgreg.c |  569 ++++++++-------------------------------
>>  1 files changed, 106 insertions(+), 463 deletions(-)
>>
>> http://gitweb.dragonflybsd.org/dragonfly.git/commitdiff/926777f68f1249ebbd1561eecc6fa75576bd4e10
>
> This commit causes D510MO (an Atom D510-based mini-ITX machine) to hang
> during boot where it usually prints the following on the screen
> (I don't remember the map[] lines are fully shown).  The lastest master
> (db421eef8) with `git revert 926777f6' boots OK.

Does set tunable hw.pci.mcfg to 0 help?

Could you find the line like following:
PCIe: Memory Mapped configuration base @ 0xe0000000, bus [0, 63]

And the "Physical memory chunk(s):" information

Best Regards,
sephe

>
>  pci0.pcib0.acpi0.nexus0.root0
>  pci0: <ACPI PCI bus> [tentative] on pcib0
>  pci0: domain=0, physical bus=0
>  found-> vendor=0x8086, dev=0xa000, revid=0x02
>        domain=0, bus=0, slot=0, func=0
>        class=06-00-00, hdrtype=0x00, mfdev=0
>        cmdreg=0x0006, statreg=0x0090, cachelnsz=0 (dwords)
>        lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
>  found-> vendor=0x8086, dev=0xa001, revid=0x02
>        domain=0, bus=0, slot=2, func=0
>        class=03-00-00, hdrtype=0x00, mfdev=0
>        cmdreg=0x0007, statreg=0x0090, cachelnsz=0 (dwords)
>        lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
>        intpin=a, irq=11
>        powerspec 2  supports D0 D3  current D0
>        MSI supports 1 message
>        map[10]: type Memory, range 32, base 0xf0200000, size 19, enabled
>        map[14]: type I/O Port, range 32, base 0x20c0, size  3, enabled
>        map[18]: type Prefetchable Memory, range 32, base 0xe0000000, size 28, enabled
>        map[1c]: type Memory, range 32, base 0xf0100000, size 20, enabled



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