cvs commit: src/sys/dev/disk/aic7xxx aic79xx_pci.c aic7xxx_pci.c

[Peter Avalos <pavalos@xxxxxxxxxxxxxxxxxxxxxxx>]

pavalos     2007/07/04 22:17:39 PDT

DragonFly src repository

  Modified files:
    sys/dev/disk/aic7xxx aic79xx_pci.c aic7xxx_pci.c 
  Log:
  When performing our register test, be careful
  to avoid resetting the chip when pausing the
  controller.  The test reads the HCNTRL register
  and then writes it back with the PAUSE bit
  explicitly set.  If the last write to the controller
  before our probe is to reset it, the CHIPRST
  bit will still be set, so we must mask it off
  before the PAUSE operation.  On some chip versions,
  we cannot access registers for a few 100us after
  a reset, so this inadvertant reset was causing PCI
  errors to occur on the read to check for paused
  status.
  
  Obtained-from: FreeBSD
  
  Revision  Changes    Path
  1.8       +5 -3      src/sys/dev/disk/aic7xxx/aic79xx_pci.c
  1.9       +5 -3      src/sys/dev/disk/aic7xxx/aic7xxx_pci.c


http://www.dragonflybsd.org/cvsweb/src/sys/dev/disk/aic7xxx/aic79xx_pci.c.diff?r1=1.7&r2=1.8&f=u
http://www.dragonflybsd.org/cvsweb/src/sys/dev/disk/aic7xxx/aic7xxx_pci.c.diff?r1=1.8&r2=1.9&f=u