cvs commit: src/sys/dev/disk/nata ata-chipset.c ata-pci.h

[Matthew Dillon <dillon@xxxxxxxxxxxxxxxxxxxxxxx>]

dillon      2007/06/02 21:27:56 PDT

DragonFly src repository

  Modified files:
    sys/dev/disk/nata    ata-chipset.c ata-pci.h 
  Log:
  Add a timings line for UDMA6 in two places.  The drivers in question may or
  may not support it, but the array still needs to be large enough for all
  possible elements.
  
  Revamp the programming of register 0x48, 0x54, and 0x40 for the Intel
  chipset support, and document the hell out of the whole thing.
  
  Register 0x54 covers both primary and secondary controllers and master and
  slave devices and was being fully programmed for each sub-device, causing
  some sub devices to become misprogrammed.  Change it so only the elements
  related to the sub-device are programmed.  It is unclear how much of a
  difference this makes for the parts in question but at least it's documented
  now.
  
  Fix logic that was causing UDMA66 devices on intel controllers to operate
  at UDMA33 speeds (does anyone even have UDMA66 devices any more?).
  
  Add support for the SB600 - from "Thomas E. Spanjaard"
  
  Revision  Changes    Path
  1.5       +179 -20   src/sys/dev/disk/nata/ata-chipset.c
  1.3       +3 -0      src/sys/dev/disk/nata/ata-pci.h


http://www.dragonflybsd.org/cvsweb/src/sys/dev/disk/nata/ata-chipset.c.diff?r1=1.4&r2=1.5&f=u
http://www.dragonflybsd.org/cvsweb/src/sys/dev/disk/nata/ata-pci.h.diff?r1=1.2&r2=1.3&f=u