Re: an0: device timeout on x31

[Jost Tobias Springenberg <jspringe@xxxxxx>]

>     Yes, please do.  Having a known-working data point is always good :-)
> 
> 					-Matt
> 					Matthew Dillon 
> 					<dillon@backplane.com>

Okay here you go, this is what my system is running with right now.
Seems to work flawlessly!

--- /usr/src/sys/dev/netif/an/if_anreg.h	2005-07-28 18:52:44 +0200
+++ /usr/src/sys/dev/netif/an/if_anreg.h	2008-05-18 17:01:52 +0200
@@ -395,13 +395,16 @@ struct an_txframe_802_3 {
 #define AN_PAYLOADTYPE_ETHER	0x0000
 #define AN_PAYLOADTYPE_LLC	0x0010
 
-#define AN_TXCTL_80211	\
-	(AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_HEADERTYPE_80211|	\
-	AN_PAYLOADTYPE_LLC|AN_TXCTL_NORELEASE)
-
-#define AN_TXCTL_8023	\
-	(AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_HEADERTYPE_8023|	\
-	AN_PAYLOADTYPE_ETHER|AN_TXCTL_NORELEASE)
+#define AN_TXCTL_80211		(AN_HEADERTYPE_80211|AN_PAYLOADTYPE_LLC)
+
+#define AN_TXCTL_8023		(AN_HEADERTYPE_8023|AN_PAYLOADTYPE_ETHER)
+
+/* 
+ * Additions to transmit control bits for MPI350
+ */
+
+#define AN_TXCTL_HW(x)		( x ? (AN_TXCTL_NORELEASE) : \
+	(AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_TXCTL_NORELEASE))
 
 #define AN_TXGAP_80211		0
 #define AN_TXGAP_8023		0





--- /usr/src/sys/dev/netif/an/if_an.c	2008-05-14 13:59:18 +0200
+++ /usr/src/sys/dev/netif/an/if_an.c	2008-05-18 17:02:52 +0200
@@ -2480,7 +2480,7 @@ an_start(struct ifnet *ifp)
 	struct mbuf		*m0 = NULL;
 	struct an_txframe_802_3	tx_frame_802_3;
 	struct ether_header	*eh;
-	int			id, idx, i;
+	int			id, idx, i, ready;
 	unsigned char           txcontrol;
 	struct an_card_tx_desc an_tx_desc;
 	u_int8_t		*buf;
@@ -2501,12 +2501,14 @@ an_start(struct ifnet *ifp)
 		return;
 	}
 
+	ready = 0;
 	idx = sc->an_rdata.an_tx_prod;
 
 	if (!sc->mpi350) {
 		bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
 
 		while (sc->an_rdata.an_tx_ring[idx] == 0) {
+			ready = 1;
 			m0 = ifq_dequeue(&ifp->if_snd, NULL);
 			if (m0 == NULL)
 				break;
@@ -2529,7 +2531,7 @@ an_start(struct ifnet *ifp)
 				   tx_frame_802_3.an_tx_802_3_payload_len,
 				   (caddr_t)&sc->an_txbuf);
 
-			txcontrol = AN_TXCTL_8023;
+			txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350);
 			/* write the txcontrol only */
 			an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
 				      sizeof(txcontrol));
@@ -2563,11 +2565,12 @@ an_start(struct ifnet *ifp)
 		CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
 
 		while (sc->an_rdata.an_tx_empty ||
-		    idx != sc->an_rdata.an_tx_cons) {
+		       idx != sc->an_rdata.an_tx_cons) {
+			ready = 1;
 			m0 = ifq_dequeue(&ifp->if_snd, NULL);
-			if (m0 == NULL) {
+			if (m0 == NULL)
 				break;
-			}
+
 			buf = sc->an_tx_buffer[idx].an_dma_vaddr;
 
 			eh = mtod(m0, struct ether_header *);
@@ -2588,7 +2591,7 @@ an_start(struct ifnet *ifp)
 				   tx_frame_802_3.an_tx_802_3_payload_len,
 				   (caddr_t)&sc->an_txbuf);
 
-			txcontrol = AN_TXCTL_8023;
+			txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350);
 			/* write the txcontrol only */
 			bcopy((caddr_t)&txcontrol, &buf[0x08],
 			      sizeof(txcontrol));
@@ -2609,7 +2612,7 @@ an_start(struct ifnet *ifp)
 			an_tx_desc.an_len =  0x44 +
 				tx_frame_802_3.an_tx_802_3_payload_len;
 			an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
-			for (i = 0; i < sizeof(an_tx_desc) / 4 ; i++) {
+			for (i = sizeof(an_tx_desc) / 4 - 1; i >= 0 ; --i) {
 				CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
 				    /* zero for now */ 
 				    + (0 * sizeof(an_tx_desc))
@@ -2637,7 +2640,7 @@ an_start(struct ifnet *ifp)
 		CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
 	}
 
-	if (m0 != NULL)
+	if (!ready)
 		ifp->if_flags |= IFF_OACTIVE;
 
 	sc->an_rdata.an_tx_prod = idx;




-- 
Jost Tobias Springenberg <jspringe@uos.de>